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19-3473; Rev 0; 10/04
-48V Hot-Swap Controllers with External RSENSE
General Description
The MAX5948A/MAX5948B are hot-swap controllers that allow a circuit card to be safely hot plugged into a live backplane. The MAX5948A/MAX5948B operate from -20V to -80V and are well-suited for -48V power systems. The MAX5948A is pin- and function-compatible with both the LT1640AL and LT1640L. The MAX5948B is pin- and function-compatible with both the LT1640AH and LT1640H. The MAX5948A/MAX5948B provide a controlled turn-on to circuit cards preventing glitches on the power-supply rail and damage to board connectors and components. The MAX5948A/MAX5948B provide undervoltage, overvoltage, and overcurrent protection. These devices ensure the input voltage is stable and within tolerance before applying power to the load. Both the MAX5948A and MAX5948B protect a system against overcurrent and short-circuit conditions by turning off the external MOSFET in the event of a fault condition. Both devices feature an open-drain power-good status output, PWRGD for MAX5948A or PWRGD for MAX5948B, that can be used to enable downstream converters. The MAX5948A/MAX5948B are available in an 8-pin SO package. Both devices are specified for the extended -40C to +85C temperature range.
Features
Allow Safe Board Insertion and Removal from a Live -48V Backplane Pin- and Function-Compatible with LT1640AL/LT1640L (MAX5948A) Pin- and Function-Compatible with LT1640AH/LT1640H (MAX5948B) Withstand -100V Input Transients with No External Components Operate from -20V to -80V Programmable Inrush and Short-Circuit Current Limits Programmable Overvoltage Protection Programmable Undervoltage Lockout Power Up into a Shorted Load Power-Good Control Output
MAX5948A/MAX5948B
Ordering Information
PART MAX5948AESA MAX5948BESA TEMP RANGE -40C to +85C -40C to +85C PIN-PACKAGE 8 SO 8 SO
Applications
Central-Office Switching Network Switches/Routers Server Line Cards Base-Station Line Cards
PART MAX5948AESA MAX5948BESA
Selector Guide
PWRGD POLARITY Active Low (PWRGD) Active High (PWRGD)
Pin Configuration
TOP VIEW
PWRGD (PWRGD) 1 OV UV 2 3
8 7
VDD DRAIN GATE SENSE
MAX5948A MAX5948B
6 5
VEE 4
SO
( ) FOR MAX5948B.
Typical Operating Circuit appears at end of data sheet. ________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
-48V Hot-Swap Controllers with External RSENSE MAX5948A/MAX5948B
ABSOLUTE MAXIMUM RATINGS
(All voltages are referenced to VEE, unless otherwise noted.) Supply Voltage (VDD - VEE ) .................................-0.3V to +100V PWRGD, PWRGD .................................................-0.3V to +100V DRAIN (Note 1)........................................................-2V to +100V SENSE ....................................................................-0.3V to +20V GATE (internally clamped) .....................................-0.3V to +18V UV and OV..............................................................-0.3V to +60V Current through SENSE ....................................................20mA Current into GATE...........................................................300mA Current into Any Other Pin................................................20mA Current into Drain............................................-100mA to +20mA Continuous Power Dissipation (TA = +70C) 8-Pin SO (derate 5.9mW/C above +70C)...................471mW Operating Temperature Range ...........................-40C to +85C Junction Temperature .....................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Note 1: Test condition per Figure 1. DRAIN current must be limited to the specified 100mA maximum.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VEE = 0V, VDD = 48V, TA = -40C to +85C. Typical values are at TA = +25C, unless otherwise noted.) (Notes 2, 3)
PARAMETER POWER SUPPLIES Operating Input Voltage Range Supply Current Gate Pin Pullup Current Gate Pin Pulldown Current External Gate Drive GATE to VEE Clamp Voltage CIRCUIT BREAKER Current-Limit Trip Voltage SENSE Input Bias Current UV PIN UV High Threshold UV Low Threshold UV Hysteresis UV Input Bias Current OV PIN OV High Threshold OV Low Threshold OV Hysteresis OV Input Bias Current DRAIN Input Bias Current Power-Good Threshold Power-Good Threshold Hysteresis VOVH VOVL VOVHY IINOV IDRAIN VPG VPGHY VOV = VEE VDRAIN = 48V VDRAIN - VEE, high to low transition 0 10 1.1 80 1.4 0.4 OV low to high transition OV high to low transition 1.198 1.165 1.223 1.203 20 -0.5 250 2.0 1.247 1.232 V V mV A A V V VUVH VUVL VUVHY IINUV VUV = VEE 0 UV low to high transition UV high to low transition 1.213 1.198 1.243 1.223 20 -0.5 1.272 1.247 V V mV A VCB ISENSE VCB = VSENSE - VEE VSENSE = 50mV 40 0 50 -0.03 60 -1 mV A VDD IDD IPU IPD VGATE VGSCLMP UV = 3V, OV = VEE, SENSE = VEE GATE drive on, VGATE = VEE Any fault condition, VGATE = 2V VGATE - VEE, 20V VDD 80V VGATE - VEE, current into GATE = 30mA -30 24 10 15 20 0.7 -45 50 13.5 16.4 80 2 -60 70 18 18 V mA A mA V V SYMBOL CONDITIONS MIN TYP MAX UNITS
GATE DRIVER AND CLAMPING CIRCUITS
PWRGD OUTPUT SIGNAL REFERENCED TO DRAIN
2
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-48V Hot-Swap Controllers with External RSENSE
ELECTRICAL CHARACTERISTICS (continued)
(VEE = 0V, VDD = 48V, TA = -40C to +85C. Typical values are at TA = +25C, unless otherwise noted.) (Notes 2, 3)
PARAMETER PWRGD, PWRGD Output Leakage Power-Good Output Impedance (PWRGD to DRAIN) PWRGD Output Low Voltage PWRGD Output Low Voltage AC PARAMETERS OV High to GATE Low UV Low to GATE Low OV Low to GATE High UV High to GATE High SENSE High to GATE Low DRAIN Low to PWRGD Low DRAIN Low to (PWRGD - DRAIN) High DRAIN High to PWRGD High DRAIN High to (PWRGD DRAIN) Low tPHLOV tPHLUV tPLHOV tPLHVL tPHLSENSE tPHLPG MAX5948B, Figures 2, 6 MAX5948A, Figures 2, 6 tPLHPG MAX5948B, Figures 2, 6 0.5 0.5 0.5 s Figures 2, 3 Figures 2, 4 Figures 2, 3 Figures 2, 4 Figures 2, 5 MAX5948A, Figures 2, 6 2 0.5 0.4 3.3 3.4 3 0.5 s 4 s s s s s SYMBOL IOH ROUT VOL VOL CONDITIONS PWRGD (MAX5948A) = 80V, VDRAIN = 48V, PWRGD (MAX5948B) = 80V, VDRAIN = 0V PWRGD (MAX5948B) (VDRAIN - VEE) < VPG VPWRGD - VEE; VDRAIN - VEE < VPG, IOUT = 5mA (MAX5948A) VPWRGD - VDRAIN; VDRAIN = 5V, IOUT = 5mA (MAX5948B) 500 x 103 0.11 0.11 0.4 0.4 MIN TYP MAX 10 UNITS A M V V
MAX5948A/MAX5948B
Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to VEE, unless otherwise specified. Note 3: Limits are 100% tested at TA = +25C and +85C. Limits at -40C are guaranteed by design.
VDD UV PWRGD/PWRGD
OV VEE
MAX5948
SENSE GATE DRAIN 100mA MAX TEST VOLTAGE 2V
Figure 1. -2V DRAIN Voltage Test Circuit
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3
-48V Hot-Swap Controllers with External RSENSE MAX5948A/MAX5948B
Typical Operating Characteristics
(VDD = 48V, VEE = 0V, TA = +25C, unless otherwise noted.)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX5948 toc01
SUPPLY CURRENT vs. TEMPERATURE
0.9 0.8 SUPPLY CURRENT (mA) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0
MAX5948 toc02
900 800 SUPPLY CURRENT (A) 700 600 500 400 300 200 100 0 0 10 20 30 40
1.0
50 60 70 80 90 100
-50
-25
0
25
50
75
100
SUPPLY VOLTAGE (V)
TEMPERATURE (C)
GATE VOLTAGE vs. SUPPLY VOLTAGE
MAX5948 toc03
GATE VOLTAGE vs. TEMPERATURE
MAX5948 toc04
16 14 12 GATE VOLTAGE (V)
15.0 14.5 GATE VOLTAGE (V) 14.0 13.5 13.0 12.5 12.0
10 8 6 4 2 0 0 10 20 30 40 50 60 70 80 90 100 SUPPLY VOLTAGE (V)
-50
-25
0
25
50
75
100
TEMPERATURE (C)
CIRCUIT-BREAKER TRIP VOLTAGE vs. TEMPERATURE
MAX5948 toc05
GATE PULLUP CURRENT vs. TEMPERATURE
VGATE = 0V 47 GATE PULLUP CURRENT (A) 46 45 44 43 42 41 40 -50 -25 0 25 50 75 100
MAX5948 toc06
55 54 TRIP VOLTAGE (mV) 53 52 51 50 49 48 -50 -25 0 25 50 75
48
100
TEMPERATURE (C)
TEMPERATURE (C)
4
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-48V Hot-Swap Controllers with External RSENSE MAX5948A/MAX5948B
Typical Operating Characteristics (continued)
(VDD = 48V, VEE = 0V, TA = +25C, unless otherwise noted.)
GATE PULLDOWN CURRENT vs. TEMPERATURE
MAX5948 toc07
PWRGD OUTPUT LOW VOLTAGE vs. TEMPERATURE (MAX5948A)
IOUT = 1mA PWRGD OUTPUT LOW VOLTAGE (mV) 35 30 25 20 15 10 5 0 1 -50 -25 0 25 50 75 100 -50
MAX5948 toc08
PWRGD OUTPUT IMPEDANCE vs. TEMPERATURE (MAX5948B)
MAX5948 toc09
60 VGATE = 2V GATE PULLDOWN CURRENT (mA) 55 50 45 40 35 30 -50 -25 0 25 50 75
40
10,000
OUTPUT IMPEDANCE (G)
1000
100
10
100
-25
0
25
50
75
100
TEMPERATURE (C)
TEMPERATURE (C)
TEMPERATURE (C)
V+ 5V
R 5k PWRGD/PWRGD OV VOV VDD DRAIN VDRAIN VS 48V
MAX5948A MAX5948B
UV VUV GATE
VEE
SENSE VSENSE
Figure 2. Test Circuit 1
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5
-48V Hot-Swap Controllers with External RSENSE MAX5948A/MAX5948B
Timing Diagrams
2V 1.223V OV 2V 1.203V UV 0V 0V tPHLOV tPLHOV GATE 1V 1V GATE 1V 1V tPHLUV tPLHUV 1.223V 1.243V
Figure 3. OV to GATE Timing
Figure 4. UV to GATE Timing
1.8V DRAIN VEE DRAIN 100mV SENSE VEE tPHLSENSE PWRGD VEE 1V 50mV
1.4V
tPHLPG
1V
1.8V DRAIN GATE 0V 1V tPLHPG tPHLPG 1.4V
PWRGD VPWRGD - VDRAIN = 0V
1V
1V
Figure 5. SENSE to GATE Timing
Figure 6. DRAIN to PWRGD/PWRGD Timing
6
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-48V Hot-Swap Controllers with External RSENSE
Pin Description
PIN MAX5948A MAX5948B 1 -- NAME FUNCTION Power-Good Signal Output. PWRGD is an active-low open-drain status output referenced to VEE. PWRGD is low when VDRAIN - VEE VPG, indicating a power-good condition. PWRGD is open drain otherwise. Power-Good Signal Output. PWRGD is an active-high open-drain status output referenced to DRAIN. PWRGD is in a high-impedance state when VDRAIN - VEE VPG, indicating a power-good condition. PWRGD is pulled low to DRAIN otherwise. Input Pin for Overvoltage Detection. OV is referenced to VEE. When OV is pulled above VOVH voltage, the GATE pin is immediately pulled low. The GATE pin remains low until the OV pin voltage reduces to VOVL. Input Pin for Undervoltage Detection. UV is referenced to VEE. When UV is pulled above VUVH voltage, the GATE is enabled. When UV is pulled below VUVL, GATE is pulled low. UV is also used to reset the circuit breaker after a fault condition. To reset the circuit breaker, pull UV below VUVL. Device Negative Power-Supply Input. Connect to the negative power-supply rail. Current-Sense Voltage Input. Connect to an external sense resistor and the external MOSFET source. The voltage drop across the external sense resistor is monitored to detect overcurrent or short-circuit fault conditions. Connect SENSE to VEE to disable the circuitbreaker feature. Gate-Drive Output. Connect to gate of the external n-channel MOSFET. Output-Voltage Sense Input. Connect to the output-voltage node (drain of external n-channel MOSFET). Positive Power-Supply Rail Input. This is the power ground in the negative-supply voltage system. Connect to the most positive potential of the power-supply inputs.
MAX5948A/MAX5948B
PWRGD
--
1
PWRGD
2
2
OV
3
3
UV
4
4
VEE
5
5
SENSE
6 7 8
6 7 8
GATE DRAIN VDD
Detailed Description
The MAX5948A/MAX5948B are integrated hot-swap controllers for -48V power systems. They allow circuit boards to be safely hot plugged into a live backplane without causing a glitch on the power-supply rail. When circuit boards are inserted into a live backplane, the bypass capacitors at the input of the board's power module or switching power supply can draw large inrush currents as they charge. The inrush currents can cause glitches on the system power-supply rail and damage components on the board. The MAX5948A/MAX5948B provide a controlled turn-on to circuit cards preventing glitches on the power-supply rail and damage to board connectors and components. Both the MAX5948A and MAX5948B provide undervoltage, overvoltage, and overcurrent protection. The MAX5948A/MAX5948B ensure the input voltage is stable and within tolerance before applying power to the load.
Board Insertion
Figure 6a shows a typical hot-swap circuit for -48V systems. When the circuit board first makes contact with the backplane, the DRAIN to GATE capacitance (Cgd) of Q1 pulls up the GATE voltage to roughly I(V EE x Cgd) / (C gd + C gs )I. The MAX5948_ features an internal dynamic clamp between GATE and VEE to keep the gate-to-source voltage of Q1 low during hot insertion, preventing Q1 from passing an uncontrolled current to the load. For most applications, the internal clamp between GATE and VEE of the MAX5948A/MAX5948B eliminates the need for an external gate-to-source capacitor. Resistor R3 limits the current into the clamp circuitry during card insertion.
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7
-48V Hot-Swap Controllers with External RSENSE MAX5948A/MAX5948B
Block Diagram
VDD
UV
VCC AND REFERENCE GENERATOR
VCC
REF
MAX5948A MAX5948B
REF OUTPUT DRIVE OV 50mV LOGIC AND GATE DRIVE
PWRGD PWRGD
VPG
VEE VEE SENSE GATE DRAIN
Power-Supply Ramping
The MAX5948A/MAX5948B can reside either on the backplane or the removable circuit board (Figure 6a). Power is delivered to the load by placing an external n-channel MOSFET pass transistor in the powersupply path. After the circuit board is inserted into the backplane and the supply voltage at VEE is stable and within the undervoltage and overvoltage tolerance, the MAX5948A/ MAX5948B turn on Q1. The MAX5948A/MAX5948B gradually turn on the external MOSFET by charging the gate of Q1 with a 45A current source. Capacitor C2 provides a feedback signal to accurately limit the inrush current. The inrush current can be calculated: IINRUSH = (IPU x CL) / C2 where CL is the total load capacitance, C3 + C4, and IPU is the MAX5948_ gate pullup current. Figure 6b shows the inrush current waveform. The current through C2 controls the GATE voltage. At the end of the DRAIN ramp, the GATE voltage is charged to its final value. The GATE-to-SENSE clamp limits the maximum VGS to about 18V under any condition.
8
Board Removal
If the card is removed from a live backplane, the output capacitor on the card may not be immediately discharged. While the output capacitor is discharging, the MAX5948_ continues to operate as if the input supply were still connected because the output capacitor temporarily supplies operating current to the IC. If the circuit is connected as in Figure 7a, the voltage at the UV pin falls below the UVLO detect threshold, and the MAX5948_ turns off the external MOSFET. If R4 in the circuit is connected directly to the -48V return, the external MOSFET remains on until the capacitor is discharged sufficiently to drop the UV pin voltage to the UVLO detect threshold. In either case, when the MOSFET is turned off, the output capacitor continues to discharge by the IC supply current IDD. The IDD flows into the IC at the VDD terminal, out at the VEE terminal, and back to the capacitor through the substrate diode of the external MOSFET. There is also a parallel current path between the VEE and DRAIN terminals through multiple internal ESD-protection diodes. The protection circuit built into the IC allows the DRAIN terminal voltage to drop below that of
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-48V Hot-Swap Controllers with External RSENSE MAX5948A/MAX5948B
-48V RTN (SHORT PIN) -48V RTN R4 562k 1% UV R5 9.09k 1% * R6 10k 1% OV VEE SENSE PWRGD
VICOR VI-J3D-CY VDD C3 0.1F 100V C4 100F 100V VIN+
GATE IN
MAX5948B
GATE R3 18k 5% R2 10 5% C2 3.3nF 100V DRAIN
VIN-
R1 0.02 5% -48V *DIODES INC. SMAT70A.
C1 150nF 25V
Q1 IRF530
Figure 7a. Inrush Control Circuitry
the V EE terminal so long as the absolute maximum allowed DRAIN terminal current (-100mA) is not exceeded. As IDD is only 2mA maximum, this limiting current will not even be approached.
INRUSH CURRENT 1A/div GATE - VEE 10V/div
Electronic Circuit Breaker
The MAX5948 provides a circuit-breaker feature that protects against excessive load current and short-circuit conditions. The load current is monitored by sensing the voltage across an external sense resistor connected between VEE and SENSE. If the voltage between VEE and SENSE exceeds the current-limit trip voltage (V CB ) for a period of tPHLSENSE, the electronic circuit breaker will trip, causing the MAX5948A/MAX5948B to turn off the external MOSFET as shown in Figure 8. After an overcurrent fault condition, the circuit breaker can be reset by pulling the UV pin low and then pulling UV high or by cycling power to the MAX5948A/ MAX5948B. If more than 3s (typ) deglitch time (t PHLSENSE ) is needed to prevent spurious shutdown due to load current spikes or noise, a simple lowpass filter can be used between the SENSE and VEE pins as shown in
CONTACT BOUNCE
DRAIN 50V/div VEE 50V/div
4ms/div
Figure 7b. Input Inrush Current
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9
-48V Hot-Swap Controllers with External RSENSE MAX5948A/MAX5948B
Figure 9. Resistor R7 and capacitor C3 slow down the response of the circuit breaker to filter momentary glitches in the SENSE voltage. The additional delay time can be estimated with the following equation: V -V t cbdly = R7 x C3 x In f I Vf - VCB I -I = R7 x C3 x In f I If - ICB where If is the current in fault condition, II is the initial current before the fault, and ICB is the circuit-breaker trip current (I CB = VCB/R1). Alternatively, the corresponding voltages across the sense resistor (Vf, VI, and V CB ) may be used in the equation as shown. The SENSE pin of the MAX5948A/MAX5948B sources very little current (0.02A typ), so the addition of resistor R7 will introduce very little error in the circuit-breaker trip voltage. For example, a 10k resistor for R7 will only cause a 200V offset.
CONTACT BOUNCE VEE 50V/div INRUSH CURRENT 2A/div GATE - VEE 5V/div
4ms/div
Figure 8. Startup Into a Short Circuit
Example: A system has a 1A nominal load current and a 20m sense resistor. The circuit-breaker delay needs to be increased to 50s in response to a load current
-48V RTN (SHORT PIN) -48V RTN R4 562k 1% UV R5 9.09k 1% * R6 10k 1% OV VEE C3 SENSE GATE R3 18k 5% R2 10 5% C2 3.3nF 100V DRAIN PWRGD
VDD
C4 100F 100V
MAX5948A
R1 0.02 5% -48V *DIODES INC. SMAT70A.
R7
C1 150nF 25V
Q1 IRF530
Figure 9. Extending the Short-Circuit Protection Delay
10
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-48V Hot-Swap Controllers with External RSENSE
step to 5A. The circuit-breaker trip current is 50mV/20m = 2.5A. Solving for R7 x C3 in the equation above yields a desired time constant of 100s. This can be achieved with R7 = 100 and C3 = 1F. In the event of a short circuit at the output, the input supply may dip below the UV threshold, resetting the circuit breaker. The MAX5948 cycles ON and OFF until the short is removed, which can be minimized by creating a deglitching delay at the UV pin with a capacitor from UV to VEE. This allows the input supply to recover before the UV pin resets the circuit breaker. Figure 10 shows a circuit that automatically resets the circuit breaker after a current fault. Transistors Q2 and Q3 along with C4, D1, R7, and R8 form a programmable one-shot circuit. In normal operation, the GATE pin is pulled high and Q3 is turned on, pulling node 2 to VEE. Resistor R8 turns off Q2. When a short occurs, the GATE pin is pulled low and Q3 turns off. Node 2 starts to charge C4 and Q2 turns on, pulling the UV pin low and resetting the circuit breaker. The instant C4 is fully charged, R8 turns off Q2, UV goes high and the GATE starts to ramp up. Q3 turns back on and pulls node 2 back to VEE. Diode D1 clamps node 3 at one diode drop below VEE. The duty cycle is set to 10% to prevent Q1 from overheating.
MAX5948A/MAX5948B
Undervoltage and Overvoltage Protection
The UV and OV pins can be used to detect undervoltage and overvoltage conditions. The UV and OV pins are internally connected to analog comparators with 20mV of hysteresis. When the UV voltage falls below its threshold or the OV voltage rises above its threshold, the GATE pin is immediately pulled low. The GATE pin is held low until UV goes high and OV is low indicating that the input supply voltage is within specification.
-48V RTN (SHORT PIN)
-48V RTN R7 1M 5% C4 1F 100V * OV VEE R9 10k 1% Q2 2N2222 D1 1N4148 -48V *DIODES INC. SMAT70A. R8 510k 5% Q3 ZVN3310 C1 150nF 25V R5 19.1k 1% SENSE R6 562k 1% NODE 2 R4 562k 1% UV PWRGD NODE2 50V/div C3 100F 100V GATE 2V/div
VDD
MAX5948A
GATE R3 18k 5% R2 10 5% C2 3.3nF 100V DRAIN
R1 0.02 5%
1s/div
Q1 IRF530
Figure 10. Automatic Restart After Current Fault
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11
-48V Hot-Swap Controllers with External RSENSE MAX5948A/MAX5948B
The UV pin is also used to reset the circuit breaker after a fault condition has occurred. The UV pin can be pulled below VUVL to reset the circuit breaker. Figure 11a shows how to program the undervoltage and overvoltage trip thresholds using three resistors. With R4 = 562k, R5 = 9.09k, and R6 = 10k, the undervoltage threshold is set to 37.2V (with a 37.8V release from undervoltage) and the overvoltage is set to 71.1V (with a 69.9V release from overvoltage). More hysteresis can be added to the undervoltage lockout with the circuit shown in Figure 11b. Resistor R3 connected between GATE and UV lowers the supply undervoltage lockout threshold (supply voltage decreasing) to:
R1 R2 x R3 + R1x R3 + R1x R2 VUV,HL = VUVL - VGATE x R2 x R3 R3
-48V RTN (SHORT PIN) -48V RTN R4 VDD VUV = 1.223 R4 + R5 + R6 R5 + R6 R5 VOV = 1.223 R4 + R5 + R6 R6 R6 OV VEE UV
MAX5948A MAX5948B
-48V
Figure 11a. Undervoltage and Overvoltage Sensing
where VUVL is typically 1.223V. The supply voltage to release from undervoltage lockout (supply voltage increasing) is: R2 x R3 + R1x R3 + R1x R2 VUV,LH = VUVH R2 x R3
where VUVH is typically 1.243V. The supply undervoltage lockout hysteresis is the difference, or:
R1 R2 x R3 + R1x R3 + R1x R2 VUV,HYS = VUVHY + VGATE x R2 x R3 R3
where VUVHY is typically 20mV.
-48V RTN (SHORT PIN) -48V RTN R4 506k 1% UV UV OV = 37.6V = 43V * = 71V R5 8.87k 1% R2 16.9k 1% R3 1.62M 1% UV VEE R1 562k 1% OV
VDD
MAX5948
SENSE GATE
R7 0.02 5% -48V *DIODES INC. SMAT70A.
C1 150nF 25V
R6 10 5%
Q1 IRF530
Figure 11b. Programmable Hysteresis For Undervoltage 12 ______________________________________________________________________________________
-48V Hot-Swap Controllers with External RSENSE MAX5948A/MAX5948B
-48V RTN (SHORT PIN) -48V RTN VDD R4 VICOR VI-J3D-CY VIN+ VOUT+
MAX5948B
I1 UV Q2
PWRGD ON/OFF C4
R5
VPG
Q3 VINVEE VOUT-
*
OV
R6 VEE SENSE GATE R3
DRAIN
C2
C1 R1 -48V *DIODES INC. SMAT70A. Q1
R2
Figure 12. Active-High Enable Module
A separate resistor-divider must be used for the overvoltage lockout setting. The supply overvoltage lockout threshold is: R4 + R5 VOV = VOVH R5 where VOVH is typically 1.223V. Using R1 = 562k, R2 = 16.9k, R3 = 1.62M, R4 = 506k, R5 = 8.87k, and the typical value of VGATE = 13.5V results in the following thresholds: VUV,HL = 37.6V VUV,LH = 43V (with hysteresis now increased to 5.4V), and VOV = 71V (with 1.2V hysteresis).
PWRGD/PWRGD Output
The PWRGD (PWRGD) output can be used directly to enable a power module after hot insertion. The
MAX5948A (PWRGD) can be used to enable modules with an active-low enable input (Figure 13), while the MAX5948B (PWRGD) is used to enable modules with an active-high enable input (Figure 12). The PWRGD signal is referenced to the DRAIN terminal, which is the negative supply of the power module. The PWRGD signal is referenced to VEE. When the DRAIN voltage of the MAX5948A is high with respect to VEE, the internal pulldown MOSFET Q2 is off and the PWRGD pin is in a high-impedance state (Figure 13). PWRGD is pulled high by the module's internal pullup current source, turning the module off. When the DRAIN voltage drops below VPG, Q2 turns on and PWRGD pulls low, enabling the module. The PWRGD signal can also be used to turn on an LED or optoisolator to indicate that the power is good (Figure 13) (see the Component Selection Procedure section).
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13
-48V Hot-Swap Controllers with External RSENSE MAX5948A/MAX5948B
-48V RTN (SHORT PIN) -48V RTN VDD R4 ACTIVE-HIGH ENABLE MODULE VIN+ VOUT+
MAX5948A
UV
PWRGD ON/OFF C4
R5
VPG
Q2 VINVEE VOUT-
*
OV
R6 VEE SENSE GATE R3
DRAIN
C2
C1 R1 -48V *DIODES INC. SMAT70A. Q1
R2
Figure 13. Active-Low Enable Module
When the DRAIN voltage of the MAX5948B is high with respect to VEE (Figure 12), the internal MOSFET Q3 is turned off so that I1 and the internal MOSFET Q2 clamp the PWRGD pin to the DRAIN pin. MOSFET Q2 sinks the module's pullup current, and the module turns off. When the DRAIN voltage drops below VPG, MOSFET Q3 turns on, shorting I1 to VEE and turning Q2 off. The pullup current in the module pulls PWRGD high, enabling the module.
prevent the FET from accidentally turning on. When a fault condition is detected, GATE is pulled low with a 50mA current.
DRAIN Pin Protection
The MAX5948's DRAIN pin withstands negative voltages (referenced to VEE); no external diode is required. When the -48V backplane shorts to ground and V EE becomes 0V, the DRAIN pin is held at less than 1.5V (sum of Q1's body diode and voltage drop across R1) below VEE due to the storage capacitor C3 (Figure 13). The -1.5V results in a 50mA reverse DRAIN current, which is within the capability of the MAX5948. A design with R1 larger than 0.1 may require a resistor in series with the DRAIN pin to avoid exceeding the 50mA drain current maximum.
GATE Voltage Regulation
GATE goes high when the following startup conditions are met: UV is high, OV is low, the supply voltage is above VUV,LH, and (VSENSE - VEE) is less than 50mV. GATE is pulled up with a 45A current source and is regulated at 13.5V above V EE . The MAX5948A/ MAX5948B include an internal clamp that ensures the GATE voltage of the external MOSFET never exceeds 18V. During a fast-rising VDD, the clamp also keeps the GATE and SENSE potentials as close as possible to
14
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-48V Hot-Swap Controllers with External RSENSE MAX5948A/MAX5948B
PWRGD GND GND (SHORT PIN) R4 562k 1% UV R5 9.09k 1% * R6 10k 1% OV VEE SENSE PWRGD R7 51k 5% VDD
MAX5948A
GATE R3 18k 5% R2 10 5% C2 3.3nF 100V DRAIN MOC207 C3 100F 100V
R1 0.02 5% -48V *DIODES INC. SMAT70A.
C1 150nF 25V
Q1 IRF530
Figure 14. Using PWRGD to Drive an Optoisolator
Applications Information
(Refer to the Typical Operating Circuit.)
Sense Resistor
The circuit-breaker threshold is set to 50mV (typically). Select a sense resistor that causes a drop equal to or above the current-limit threshold at a current level above the maximum normal operating current. Typically, set the overload current to 1.5 to 2.0 times the nominal load current plus the load-capacitance charging current during startup. Choose the sense resistor power rating to be greater than (VCB)2 / RSENSE. *
50mV ICB Realize that ICB varies 20% due to trip-voltage tolerance. Set allowable inrush current: RSENSE = IINRUSH 0.8 x 40mV - ILOAD or RSENSE IINRUSH + ILOAD 0.8 x ICB(MIN)
Component Selection Procedure
* * * * Determine load capacitance: CL = C3 + C4 + module input capacitance Determine load current, ILOAD. Select circuit-breaker current, for example: ICB = 2 x ILOAD Calculate RSENSE:
*
Determine value of C2: 45A x CL C2 = IINRUSH Calculate value of C1: - VGS(TH) V C1 = (C2 + Cgd) x IN(MAX) VGS(TH)
*
______________________________________________________________________________________
15
-48V Hot-Swap Controllers with External RSENSE MAX5948A/MAX5948B
Typical Operating Circuit
GND GND (SHORT PIN) R4 562k 1% UV R5 9.09k 1% * R6 10k 1% OV VEE SENSE PWRGD
VDD
MAX5948A
GATE R3 18k 5% R2 10 5% C2 3.3nF 100V VIN+ C1 150nF 25V DRAIN
ON/OFF VOUT+ SENSE+
5V
R1 0.02 5% -48V *DIODES INC. SMAT70A.
C3 0.1F 100V
C4 100F 100V
LUCENT JW050A1-E TRIM SENSEVINVOUT-
C5 100F 16V
Q1 IRF530
*
Determine value of R3: 150s R3 C2
BVDSS 100V ID(ON) 3 x ILOAD DPAK, D2PAK, or TO-220AB Choose the lowest practical R DS(ON) within budget constraints. MOSFETs with values from 14m to 540m are available at 100V breakdown. Ensure that the temperature rise of Q1 junction is not excessive at normal load current for the package selected. Ensure that ICB current during voltage transients does not exceed allowable transient-safe operating-area limitations. This is determined from the SOA and transient-thermal-resistance curves in the Q1 manufacturer's data sheet. Example 1: ILOAD = 2.5A, efficiency = 98%, then VDS = 0.96V is acceptable, or RDS(ON) 384m at operating temperature is acceptable. An IRL520NS 100V nMOS with R DS(ON) 180m and I D(ON) = 10A is available in D2PAK. (A Vishay Siliconix SUD40N10-25 100V nMOS with RDS(ON) 25m and ID(ON) = 40A is available in DPAK, but may be more costly because of a larger die size).
* Set R2 = 10. * If an optocoupler is utilized as in Figure 14, determine the LED series resistor: V - 2V R7 = IN(NOMINAL) 3mA ILED 5mA Although the suggested optocoupler is not specified for operation below 5mA, its performance is adequate for 36V temporary low-line voltage where LED current would then be 2.2mA to 3.7mA. If R7 is set as high as 51k, optocoupler operation should be verified over the expected temperature and input voltage range to ensure suitable operation when LED current 0.9mA for 48V input and 0.7mA for 36V input. If input transients are expected to momentarily raise the input voltage to >100V, select an input transient-voltage-suppression diode (TVS) to limit maximum voltage on the MAX5948 to less than 100V. A suitable device is the Diodes Inc. SMAT70A telecom-specific TVS. Select Q1 to meet supply voltage, load current, efficiency, and Q1 package power-dissipation requirements:
16
______________________________________________________________________________________
-48V Hot-Swap Controllers with External RSENSE
Using the IRL520NS, VDS 0.625V even at +80C so efficiency 98.6% at 80C. PD 1.56W and junction temperature rise above case temperature would be 5C due to the package JC = 3.1C/W thermal resistance. Of course, using the SUD40N10-25 would yield an efficiency greater than 99.8% to compensate for the increased cost. If ICB is set to twice ILOAD, or 5A, VDS momentarily doubles to 1.25V. If COUT = 4000F, transient-line input voltage is 36V, the 5A charging-current pulse is: t= 4000F x 1.25V = 1ms 5A Example 2: ILOAD = 10A, efficiency = 98%, allowing VDS = 0.96V but RDS(ON) 96m. An IRF530 in a D2PAK exhibits RDS(ON) 90m at +25C and 135m at +80C. Power dissipation is 9.6W at +25C or 14.4W at +80C. Junction-to-case thermal resistance is 1.9W/C, so the junction temperature rise would be approximately 5C above the +25C case temperature. For higher efficiency, consider IRL540NS with RDS(ON) 44m. This allows = 99%, PD 4.4W, and TJC = +4C (JC = 1.1C/W) at +25C. Thermal calculations for the transient condition yield I CB = 20A, V DS = 1.8V, t = 0.5ms, transient JC = 0.12C/W, PD = 36W and tJC = 4.3C.
MAX5948A/MAX5948B
Entering the data sheet transient-thermal-resistance curves at 1ms provides a JC = 0.9C/W. PD = 6.25W, so tJC = 5.6C. Clearly, this is not a problem.
Chip Information
TRANSISTOR COUNT: 2645 PROCESS: BiCMOS
______________________________________________________________________________________
17
-48V Hot-Swap Controllers with External RSENSE MAX5948A/MAX5984B
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
INCHES DIM A A1 B C e E H L MAX MIN 0.069 0.053 0.010 0.004 0.014 0.019 0.007 0.010 0.050 BSC 0.150 0.157 0.228 0.244 0.016 0.050
MILLIMETERS MAX MIN 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 1.27 BSC 3.80 4.00 5.80 6.20 0.40 1.27
N
E
H
VARIATIONS:
1
INCHES
MILLIMETERS MIN 4.80 8.55 9.80 MAX 5.00 8.75 10.00 N MS012 8 AA 14 AB 16 AC
TOP VIEW
DIM D D D
MIN 0.189 0.337 0.386
MAX 0.197 0.344 0.394
D A e B A1 L C
0-8
FRONT VIEW
SIDE VIEW
PROPRIETARY INFORMATION TITLE:
PACKAGE OUTLINE, .150" SOIC
APPROVAL DOCUMENT CONTROL NO. REV.
21-0041
B
1 1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 18 (c) 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
SOICN .EPS

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